The present invention generally pertains to data processing systems and is particularly directed to a data processor analyzer and display system for distinguishing a digital signal in a received serial bit stream signal. The bits represent data in an original digital data signal having a predetermined bit rate, a predetermined number of bits per word, and a predetermined number of words per frame, with there being a predetermined synchronizing code word in each frame for defining frame. Some digital data signals are further organized to contain a predetermined number of frames per subframe.
In such a system, a processing network processes the received signal to reconstruct the bits in the bit stream, to recognize the code word from the reconstructed bits, and to define the frames in response to recognition of the code word to thereby distinguish a digital signal having the predetermined number of bits per word and the predetermined number of words per frame. The distinguished digital signal is provided at output terminals from which it may be provided to a computer for processing of the data represented by the distinguished digital signal. The distinguished digital signal also may be converted to analog signals and provided at analog output ports to such peripheral devices as strip chart recorders or printer/plotters.
A typical application for a data processor analyzer and display system is in a system for telemetering data from an aircraft. The original digital signal is produced by multiplexing a plurality of analog signals representative of various aspects of aricraft performance, converting the multiplexed analog signal to a digital signal, and code converting the digital signal into a serial bit stream. The original digital signal is transmitted from the aircraft to a ground station. The signal received at the ground station is processed by the data processor analyzer and display system to distinguish a digital signal corresponding to the original signal transmitted from the aircraft. Separate analog signals corresponding to the original analog signals are derived from the distinguished digital signal and provided at separate analog output ports that are designated to receive signals from predetermined word positions in the distinguished digital signal.
It is necessary that the processing network be programmed to receive indications of the predetermined bit rate, the predetermined number of bits per word, the predetermined number of words per frame, and the predetermined code word that correspond to the original digital signal so as to enable the processing network to distinguish the digital signal from the received bit stream. An operator typically provides such indications to the processing network by such means as punch cards or tape or manually controlled switches. With prior art systems the programming operation is quite time consuming.
The system also includes display devices for providing a visual display of data represented by the distinguished digital signal and also a visual display of the programming indications provided by the operator to the processing network. Such display devices typically are dials or digital display devices that are limited in format and capacity as to the variety of data and programming indications that can be displayed.
Typical prior art data processor analyzer and display systems may also include sub-systems that individually perform such functions as synchronizing the recognized stream of bits with an internally generated clock signal, synchronizing a sequence of frames within a sub frame, selecting particular data words for display or for transmission from a designated output terminal, code converting the serial bit stream, converting the distinguished digital signal to an analog signal(s), internally simulating a serial bit stream, in accordance with the programming indications for test purposes, and converting serial data signals to parallel data signals.
In a typical prior art system many of these functions are performed by separate consoles that are apart from a console in which the bit recognition and frame synchronization functions are performed. As a result, prior art data processor analyzer and display systems typically include a patchwork of several consoles which is inconvenient to position and complicated to operate.